In the advent of technology becoming more efficient, smaller and having enhanced performance, many integrated circuits include an increased number of components operating at a faster speed and placed on a smaller region of the integrated circuit ‘real-estate.’ As a result, power consumption of the device increases. Yet, this increase in power consumption leads to an ultimate increase in the heat of each device within a system. This heat is expensive to dissipate. In addition, an increase in power consumption is not efficient when the power supply of an electronic device has a finite supply of power (i.e. a battery operated electronic device).
There are, however, two ways in which power consumption may be decreased. First, power consumption may be decreased by decreasing the operating voltage of the electronic device. These devices include multiple computing and peripheral devices. Circuit buses provide a backbone network interface between multiple computing and peripheral devices. As such, these buses transfer electrical signals from one device to another as a means of communication. Examples of some of the devices associated with bus interconnections include macro devices such as computers, printers, and communications devices. In addition, some of the devices represented on the bus may also include internal system components such as microprocessors, memory cells, etc. The output driver of each device includes bus-interface input and output circuits to communicate with other coupled devices on the bus. Each bus-interface circuit regulates out-going signal transmission and in-coming signal reception from such other devices connected to the bus. As a means for ensuring that only one device has access to the bus at a time, all other devices connected to the bus are required to place a high-impedance condition on the bus so that no unintended signal transfer may occur. Therein, three states exist for a bus-interface circuit: a first bus-drive condition designed to transfer the equivalent of a logic low signal, a second bus-drive condition designed to transfer the equivalent of a logic high signal, and a third bus-drive condition equivalent to a high-impedance or tri-stated state.
With reference to decreasing power consumption of the system, conventionally most integrated circuits operate at 5 volts. Presently operating voltages of 3.3, 2.5 and 1.8 are available for integrate circuits. As previously described, since each device is incorporated into one system that uses one bus, the bus interface must enable each and every device, regardless of operating voltage, connected to the bus to communicate with each other. As is shown in FIG. 1a, bus 15 may include several devices that operate at a variety of voltages. Specifically, output driver 12 has an operating voltage of 3.3V and output drivers, 14 and 16, have an operating voltage of 5.5V. Damage, however, may result to a device, if a device operating at a higher operating voltage takes hold of the bus 15 and places electrical signal on the bus 15. Output driver 12 having the lower operating voltage will overheat as a result of a signal placed on the bus 15 by either output driver, 14 and 16, having the higher operating voltage. Typically, output driver 12 will include a pull up device 18 as is shown in FIG. 1b. As a result of a higher operating voltage takes hold of the bus 15 and places electrical signal on the bus 15, over a process of time, pull-up device 18 will start to degrade due-to the over-voltage condition.
A second solution that decreases power consumption is to reduce the leakage current within each device. A substantial portion of the leakage current within a system is present as a result of each output driver from each component connected to the bus located within the system. Thereby, current specifications have been derived that limit the leakage current of an output driver to a maximum value when the supply voltage is set at zero. This maximum leakage current specification exists for current that flows into the input transistor when forcing the input to a higher supply voltage. In the alternative, this maximum leakage current specification exists for current that flows out of the output transistor when forcing the output to a higher supply voltage. This current must be compliant with what those skilled in the art have termed the ‘Ioff’ specifications.
To accommodate for the over voltage condition and leakage current problem, a bus-hold circuit is utilized. The bus-hold circuit is a specific type of bus-interface circuit included within an output driver. Specifically, bus-hold circuits keep the output node of the corresponding device at a known value when no driver is active on the bus. When a driver on the same or another integrated circuit device places a low value on the output node and thereafter is tri-stated, the bus-hold circuit will retain the low value at the output node. In the same fashion, if the device places a high value on the output node and thereafter is tri-stated, the bus-hold circuit will retain the high value. Traditionally, a bus-hold circuit is implemented as a latch, e.g., as a pair of cross-coupled inverters, with one of the two inverters being a weak inverter that drives the output node.
A known solution to the over-voltage condition is to incorporate a diode in pull-up path of a bus-hold circuit to help satisfy over-voltage tolerance and maximum leakage current specifications as is shown in FIG. 2. Over-voltage tolerance, in this case, is when the voltage applied at the input In4 is forced to a level above the supply voltage VCC. Over-voltage tolerance allows a higher supply voltage to be connected to an input with a lower supply voltage. For example, if a 5V CMOS driver is active on the bus, bus-hold circuit 20 must enable the output driver operating at 3.3V not to sink any current nor be damaged when the bus is driven to 5V. Diodes, D1 and D2, are standard bus-hold diodes located within the pull-up path. These diodes, D1 and D2, block the current that would damage the power supply VCC. Accordingly, if the voltage applied to input In4 is 5.5V and the power supply voltage VCC is 3.3V, diodes, D1 and D2, block current from damaging transistor 24.
When the power supply voltages are at low voltages, however, the effect of diodes, D1 and D2, are quite substantial. As shown in FIGS. 4 and 5, the input bus-hold current or the minimum high sustaining bus-hold current IBHH is shown as positive portion of the curve. The minimum high sustaining bus-hold current IBHH is the input current that holds the input to the previous state when the output driving device goes to a high-impedance state. Particularly, the minimum high sustaining bus-hold current IBHH is the minimum high sustaining bus-hold current. As supply voltages VCC become lower, the voltage drop across the diodes, D1 and D2, becomes greater and thereby, negative effects the minimum high sustaining bus-hold current (IBHH). As a result of the effect of diodes, D1 and D2, the minimum high sustaining bus-hold current IBHH is inhibited substantially which tends to make the IBHH curves to appear as part of a saw-tooth curve as opposed to a more sinusoidal one. Note, the input bus-hold current curves IBHH and the output bus-hold current curves IBHL should be a mirror image of one another. Yet, at this voltage, the diodes substantially alter the input bus-hold current curves IBHH.
Other bus-hold solutions satisfy the maximum leakage current ‘Ioff’ specification, yet fail to support over-voltage tolerance specifications.
Thus, there exists a need for a bus-hold circuit that satisfies both the over-voltage tolerance and maximum leakage current ‘Ioff’ specification without incorporating a diode in pull-up path of a bus-hold circuit.
The present invention is directed to overcoming, or at least reducing the effects of one or more of the problems set forth above.